The present invention relates to a semiconductor device and a method for fabricating the same, and more particular to technology that is effective when applied to bipolar transistor-based semiconductor devices of the insulating element isolation type.
One known type of semiconductor device includes a base substrate and an element-forming-semiconductor layer with an insulating layer disposed between them. Devices of this type include SOI (Silicon On Insulator) devices and devices in which the element-forming semiconductor layer is divided into a plurality of semiconductor islands by isolation trenches or trenches into which an insulating material is filled. An SOI semiconductor device has quite less parasitic capacitance than a pn-junction element isolation semiconductor device and has smaller leakage current, thereby making it possible to increase the processing speed and reduce power consumption, so this technology has been applied to BiCMOS and C-Bipolar semiconductor devices with digital circuits, analog circuits or a mixture of both types, configured with bipolar and CMOS (Complementary-MOS) transistors and complementary bipolar transistors, respectively. The SOI semiconductor device also requires various types of bipolar transistors with different current capacities for various types of application circuits including logic circuits, driver circuits, and output circuits.
The bipolar transistor-based SOI semiconductor device technology that has been studied by the inventors of the present invention provides a plurality of types of large-current bipolar transistors in different geometrical sizes, and arranges and connects these large-current bipolar transistors depending on current capacities (allowable currents) required, thereby configuring an entire semiconductor device.